IEEE 1481-2019

Anotácia textu normy IEEE 1481-2019 :

Revision Standard - Active.
Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed.

ISBN: 978-1-5044-6161-0
Number of Pages: 658
Product Code: STDAPE23887
Keywords: chip delay, electronic design automation (EDA), integrated circuit (IC) design, power calculation
Category: Design Automation
Draft Number: - APPROVED DRAFT